Established 1992 in Silicon Valley. Comit provides complete chip, board and software engineering services to customers worldwide.
CONTRACT ENGG.
METHODOLOGY
CHIPS
BOARDS
SOFTWARE
SYSTEMS
SoC Verification

Comit's FiestaŽ CVXT Open Verification Environment, rich in features and libraries, offers a hardware-software coverification architecture suited for SoC designs.

FiestaŽ CVXT is extensively used at Comit's Contract Engineering Center, and is field proven over several succesful multimillion gate SoC tapeouts involving multiple clocks and diverse third party IP inclusions





FiestaŽ CVXT offers the ability to build parallel, automated, synchronized self-checking verification testbenches for complex ASIC, SoC and programmable SoC designs. The environment bolts on to industry standard Verilog simulators and supports both real-world system testing and rigorous hardware module level and interface tests. The user can either run system level code intended for final silicon to test functionality, or do feature-by-feature self-checking of the chip modules, in parallel and in simultaneous interaction with other modules in the design.

A test library builds a cumulative repository of commonly required tests.

A model library supports Bus Functional, Peripheral and Storage models.

Currently available models include:

BFM PM Storage Model
AHB Master Ethernet FLASH
PPC PLB IIC DDR SDRAM
  POS PHY L3 128 MB SDRAM
  UART  


The FiestaŽ CVXT Open verification environment is also available for licensing, either in standalone mode or as part of the complete Comit FiestaŽ Process Strandardzation and Acceleration Toolkit.

Comit also offers verification strategies based on solutions from Comit Alliance Partners and other third parties.

Feedback   |   Contact   |   Privacy & Legal © 2006 Comit Systems. All rights reserved