Fiesta® CSGT is an ASIC/FPGA synthesis script generation tool targeting Synopsys® synthesis tools. CSGT provides an intuitive graphical user interface, so that the user need not remember and use the synthesis tool commands.
Fiesta® CSGT automates creation of synthesis scripts. The tool reads a set of existing hierarchical Verilog® design files. Design attributes like clocks, port signals are automatically inferred and need not be specified by the user. The user is prompted for the relevant constraints. The tool can generate synthesis scripts for the entire design or for selected modules.